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Titre: Scaling Challenges for Embedded SRAMs in 65 nm and Beyond
Conférencier: Dr Manoj Sachdev , Université de Waterloo
Lieu: Concordia University, SGW Campus, EV 002.184 ,
Date et heure: jeudi le 10 septembre 2009 de 18:00 à 19:30

Résumé: Embedded SRAMs often comprise the majority of die area in modern Systems on Chips (SOCs). The 6T SRAM cell is the widely used and its operation and performance metrics are well understood. Scaling into the nano-metric region has created many challenges for SRAMs. Cell leakage has dramatically increased, static noise margin has significantly reduced and increasing variability has made robust design challenge. Moreover, issues such as write margin and soft-errors, which were previously not concerns, now require design considerations. This talk will review the current state of the art in embedded SRAMs, and will present few solutions to deal with the above mentioned challenges.

Note biographique: Manoj Sachdev is the Department Chair and a University Research Chair professor in Electrical and Computer Engineering Department at the University of Waterloo, Canada. His research interests include low power and high speed integrated circuit design; reliability and manufacturing issues of integrated circuits. He has contributed to five books, more than 150 technical papers, and holds more than 30 granted and pending patents.
His research has led to several awards including the best paper award in 1997 European Design and Test Conference, and an honorable mention award in 1998 International Test Conference.

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