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Titre: Des équations à la fabrication – Innovation à l’échelle mondiale dans le domaine du CMOS et de la récupération d’énergie
Conférencier: Thomas Skotnicki , CEA LETI
Lieu: Université de Sherbrooke/Parc Innovation - P2-1002 ,
Date et heure: mardi le 15 mai 2018 de 13:30 à 15:00

Résumé: The innovative technique of 2-D Poisson equation solving, I called Voltage-Doping Transformation, took 2 years of battles and rebuttals with reviewers and 60 pages of correspondence before it was finally published in IEEE EDL in 1988. Today VDT has been accounted for in major books on CMOS physics. The transistor and CMOS technology models based on VDT had given ground to the MASTAR model that was the main tool for ITRS roadmap calculations over 12 years (editions 2003 up to 2015). VDT also allowed me to infer a new transistor architecture and predict its exceptional strengths, but the Ultra-Thin Body and Box FDSOI transistor could not be realized at that time due to a lack of UTBB wafers. After 10 years of standby we found a way to demonstrate the strengths of this architecture. The Silicon On Nothing technology, we invented and patented, enables UTBB FDSOI devices to be fabricated on bulk wafers. SON was long contested, but with help of a few passionate collaborators I managed to realize the first SON devices. The results exceeded expectations, but the world was hard to convince. The first SON paper was rejected multiple times. The battle once again took close to 2 years and dozens of pages of correspondence. Eventually it was published and on the spot was nominated the best IEEE EDS paper of the year 2000 and received the Rappaport Award. Then, the process accelerated and the most importantly, helped to convince SOITEC to fabricate appropriate UTBB FDSOI wafers. With 135 papers and dozens of patents, the UTBB FDSOI technology went to production at STMicroelectronics, next at SAMSUNG and at Globalfoundries. Today UTBB FDSOI is a challenger for FinFet and is gaining market shares especially relevant to LP and IoT. UTBB FDSOI is certainly the champion of low-power electronics (we will explain why) but what is required for IoT is even more challenging, it is zero-power electronics. If time and curiosity of the audience are still there at this point of time, I will also summarize my recent inventions on energy harvesting that actually targets zero-power systems for IoT.

Note biographique: Thomas SKOTNICKI is a former STMicroelectronics Company Fellow and Technical Vice-President in charge of Disruptive Technologies, currently part-time Scientific Advisor at CEA LETI. In 2007, he received the title of Professor from the President of Poland, and has been appointed the Director of the CEZAMAT Consortium in Warsaw, Poland. The focus of his actions has always been on device physics, Low Power / Low Variability for 28nm and beyond CMOS, on innovative device structures, new memory concepts and cells, and on integration of new materials for CMOS. He inferred a new device structure (Ultra-Thin Body and BOX FDSOI) from his Voltage Doping Transformation in 1988, and has consequently driven this concept towards successful industrialization that was decided at STMicroelectronics in 2011. From 2010 he has extended the scope of his program to include Energy Harvesting for autonomous Low Power systems and devices. He holds more than 80 patents on new devices, circuits and technologies. He has presented over 50 Invited Papers and Short Course Lectures, (co-) authored about 400 scientific papers (review based), and several book chapters in the field of CMOS and Energy Harvesting. His Google-scholar H-index reads 41. From 2001 to 2007, he served as Editor for IEEE Transactions On Electron Devices. He has been teaching at EPFL (Lausanne, Switzerland) and SUPELEC (Rennes, France) and WUT (Warsaw, Poland), and has supervised and led to successful defence 28 PhD theses. He has been serving in numerous Conference Program and Executive Committees (IEDM, VLSI, ESSDERC, ECS, SNW, IWJT), Academia Advisory Boards, Governmental Expert Commissions, R&D Program Steering Committees, IEEE Award Committees (JJ Ebers and Frederik Philips), and ITRS (who was using his/his team software MASTAR for 12 consecutive editions). He is an IEEE Fellow and SEE Senior Member.

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