Titre: Digital Watermarking for IP Protection
Conférencier: Dr. Chip Hong Chang , NTU, Singapour
Lieu: Concordia , Pavillon EV, Salle EV005.253
Date et heure: mercredi le 09 janvier 2008 de 10:00 à 12:00

Résumé: Reuse based methodologies play a major role in SoC design to shorten the design turnaround time.
This design paradigm makes the intellectual property (IP) cores of digital IC increasingly vulnerable to
piracy and misappropriation. To prevent the lost of revenue, the Virtual Socket Interface (VSI) Alliance
has identified three main approaches, namely deterrent, protection and detection to IP protection. Of
which only the detection approach, such as fingerprinting and watermarking techniques, enables the IP
owner to embed specific information into the IP design as authorship proof.
Digital watermarking has been widely applied to protect the copyright of multimedia, such as images,
audio and video. Unlike the conventional artifact watermarking, watermarking for hardware IP
protection must remain functionality correct in addition to maintaining acceptable timing and hardware
overheads. A number of NP-hard Boolean satisfiability (SAT) problems are involved in the VLSI design
flow for IP creation. The excess solution space of these optimization tasks can be exploited for IP
watermarking. The user-specific information is first converted to a set of extra constraints through a
well-formed grammar and then added to the original ones to form a new set of constraints to be applied
to a heuristic SAT solver in the design process. The additional constraints limit the possible solutions to
a much smaller set. This seminar presents some recent collaborative work with the Concordia
University on the static constraint-based watermarking scheme at logic synthesis level and the dynamic
watermarking technique for finite state machines. One of the most recent ideas we conceived at the
Design-for-Testability (DfT) stage of VLSI design flow will also be presented. Since only the test signals
can be traced after the chip has been packaged, the main advantage of this idea is the ownership
legitimacy can be publicly authenticated on-site by the IP buyers. By integrating with the dynamic FSM
watermarking, it has great potential to make the watermarked design hard-to-attack while the ownership
is easy-to-trace.

Note biographique: Dr. Chip Hong Chang received his B.Eng. (Hons) in Electrical Engineering from National University of
Singapore in 1989, and his M.Eng. in 1993 and Ph.D. in 1998 both from the School of Electrical and
Electronic Engineering of Nanyang Technological University (NTU). His industrial experiences include
the component engineer of General Motors and technical consultant of Flextech Electronics Pte. Ltd..
He joined the School of Electrical and Electronic Engineering, Nanyang Technological University as an
Assistant Professor in 1999 and was promoted to Associate Professor in 2005. Dr. Chang holds
concurrent appointments at the university as the Deputy Director of the Centre for High Performance
Embedded Systems (CHiPES) since February 2000, and the Program Director of VLSI Design and
Embedded Systems research group of the Centre for Integrated Circuits and Systems (CICS) since
April 2003. He has served a number of administrative roles and provided consultancy services to local
companies during his academic career. His current research interest includes residue arithmetic for
secured computing, low-power digital circuits, digital filter design, and digital watermarking for IP
protection. He has published three book chapters and more than 120 research papers in refereed
international journals and conferences. Dr. Chang is a Senior Member of IEEE and a Fellow of IET.

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