{"id":8034,"date":"2026-05-22T19:12:15","date_gmt":"2026-05-22T17:12:15","guid":{"rendered":"https:\/\/resmiq.org\/?page_id=8034"},"modified":"2026-05-30T12:53:17","modified_gmt":"2026-05-30T10:53:17","slug":"trends-on-micro-and-nanoelectronics-and-physical-design-automation-of-transistor-networks","status":"publish","type":"page","link":"https:\/\/resmiq.org\/en\/evenements\/seminaires-et-cours-intensifs\/trends-on-micro-and-nanoelectronics-and-physical-design-automation-of-transistor-networks\/","title":{"rendered":"Trends on Micro and Nanoelectronics and Physical Design Automation of Transistor Networks"},"content":{"rendered":"
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With the support of the IEEE CAS Distinguished Lecturer program
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Ricardo Reis
<\/strong>Institute of Informatics \u2013 Federal University of Rio Grande do Sul<\/span>, Porto Alegre, Brazil<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t

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Date<\/strong> June 19, 2026
Hour :<\/strong> 9am to 4pm
Place<\/strong> : \u00c9cole de technologie sup\u00e9rieure, Pavilion A, room A-0241 (1100 Notre-Dame Street West, Montreal)<\/p>

Summary:\u00a0<\/strong>The talk starts with a short presentation of Electronics and Microelectronics evolution. Then, it will be presented a set of several trends in the design of micro and nanoelectronics circuits, including architectural issues, variability and sources of variability, EDA tools, physical design issues, printability, design of transistor networks, Layout Strategies, Regularity, 3D circuits, flexible electronics, new devices, Stretchable Silicon, Fault Tolerance, Tolerance to Radiation Effects, Factory Integration. The talk tries to motivate the audience to explore the upcoming challenges in the field. A way to reduce power consumption is to reduce the number of transistors used to implement a circuit, as leakage power is proportional to the number of transistors. It is shown a physical design approach to reduce the number of transistors needed to perform a task. It is proposed an EDA tool set to automatically generate the physical design of any transistor network. It shows an important reduction on power, also improving reliability. A standard cell library has a limited number of logical functions, and a limited number of sizings. The talk is target in optimization methods to reduce the number of transistors of a circuit. The methods allow the realization of any possible logical function or transistor network. It is included comparisons with solutions using the traditional standard cell methodology.<\/p>

Biographical note:\u00a0<\/strong>Ricardo Reis received a Bachelor degree in Electrical Engineering from Federal University of Rio Grande do Sul (UFRGS), Porto Alegre, Brazil, in 1978, and a Ph.D. degree in Microelectronics from the National Polytechnic Institute of Grenoble (INPG), France, in 1983. Doctor Honoris Causa by the University of Montpellier in 2016. He is a full professor at the Informatics Institute of Federal University of Rio Grande do Sul. His main research includes physical design automation, design methodologies, fault tolerant systems and microelectronics education. He has more than 750 publications including books, journals and conference proceedings. He was vice-president of IFIP (International Federation for Information Processing) and he was also president of the Brazilian Computer Society (two terms) and vice-president of the Brazilian Microelectronics Society. He is an active member of CASS and he received the 2015 IEEE CASS Meritorious Service Award. He was vice-president of CASS for two terms (2008\/2011). He is the founder of the Rio Grande do Sul CAS Chapter, which got the World CASS Chapter of The Year Award 2011, 2012, 2018 and 2022, and R9 Chapter of The Year 2013, 2014, 2016, 2017 and 2020. He is a founder of several conferences like SBCCI and LASCAS, the CASS Flagship Conference in Region 9. He was the General or Program Chair of several conferences like IEEE ISVLSI, SBCCI, IFIP VLSI-SoC, ICECS, PATMOS. Ricardo was the Chair of the IFIP\/IEEE VLSI-SoC Steering Committee, vice-chair of the IFIP WG10.5 and he is Chair of IFIP TC10. he received the Researcher of the Year Award in the state of Rio Grande do Sul. He is a founding member of the SBC (Brazilian Computer Society) and also founding member of SBMicro (Brazilian Microelectronics Society). He was a member of CASS DLP Program (2014\/2015), and he has done more than 70 invited talks in conferences. He is the CASS representative at the IEEE IoT Technical Committee. Ricardo received the IFIP Fellow Award in 2021 and the ACM\/ISPD Lifetime Achievement Award in 2022. He received the 2023 IEEE CASS John Choma Educational Award and the 2024 Best Associate Editor of IEEE CASS Magazine. He is also Distinguished Lecturer of IEEE CEDA (2024-2025).<\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t<\/div>","protected":false},"excerpt":{"rendered":"

Avec le concours du programme des \u00ab Distinguished Lecturerer \u00bb de la soci\u00e9t\u00e9 IEEE CAS Ricardo ReisInstituto de Inform\u00e1tica – Universidade\u00a0Federal do Rio Grande do Sul, Porto Alegre, Br\u00e9sil Date : 19 juin 2026Heure : 9h \u00e0 16hLieu : \u00c9cole de technologie sup\u00e9rieure, Pavillon A, salle A-0241 (1100, rue Notre-Dame Read More\u2026<\/a><\/p>","protected":false},"author":2,"featured_media":0,"parent":2456,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"_acf_changed":false,"footnotes":""},"axe-et-theme":[],"sujet":[],"class_list":["post-8034","page","type-page","status-publish","hentry"],"acf":[],"_links":{"self":[{"href":"https:\/\/resmiq.org\/en\/wp-json\/wp\/v2\/pages\/8034","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/resmiq.org\/en\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/resmiq.org\/en\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/resmiq.org\/en\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/resmiq.org\/en\/wp-json\/wp\/v2\/comments?post=8034"}],"version-history":[{"count":10,"href":"https:\/\/resmiq.org\/en\/wp-json\/wp\/v2\/pages\/8034\/revisions"}],"predecessor-version":[{"id":8051,"href":"https:\/\/resmiq.org\/en\/wp-json\/wp\/v2\/pages\/8034\/revisions\/8051"}],"up":[{"embeddable":true,"href":"https:\/\/resmiq.org\/en\/wp-json\/wp\/v2\/pages\/2456"}],"wp:attachment":[{"href":"https:\/\/resmiq.org\/en\/wp-json\/wp\/v2\/media?parent=8034"}],"wp:term":[{"taxonomy":"axe-et-theme","embeddable":true,"href":"https:\/\/resmiq.org\/en\/wp-json\/wp\/v2\/axe-et-theme?post=8034"},{"taxonomy":"sujet","embeddable":true,"href":"https:\/\/resmiq.org\/en\/wp-json\/wp\/v2\/sujet?post=8034"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}