Cowan, Glenn

ELEC 413/ELEC 6071 (4 credits) Mixed-signal VLSI for communication systems Prerequisite: ELEC 312 and ELEC 372. Overview of wireline communication links, mechanisms of signal degradation, modulation formats, TX/RX synchronization options, IC technology limitations, transmitter front-end circuits, receiver front-end circuits, decision circuits, clock and data recovery systems, phase-locked loops, jitter, continuous-time and discrete-time equalizers, system metrics. Lab 30h. Lectures 3h/wk. REQUIRED TEXTBOOK • B. Razavi, “Design of Integrated Circuits for Optical Communications,” 2nd Edition, Wiley, 2012. OTHER TEXTBOOKS WORTH CONSULTING: • R. J. Baker, “CMOS Circuit Design, Layout, and Simulation,” 3rd Ed., Wiley, 2010. • R. Best, “Phase-Locked Loops Design, Simulation, & Applications,” 6th Ed., McGraw-Hill, 2007. • T. Chan Carusone, D. Johns & K. Martin, “Analog Integrated Circuit Design”, 2nd Ed., Wiley, 2012 • B. Razavi, “Design of Analog CMOS Integrated Circuits,” 1st Ed., McGraw-Hill, 2000. LECTURES: • Tuesdays and Thursdays 10:15-11:30 AM in MB S2.445. Note that S2 is the second basement of the John Molson (MB) building. TENTATIVE LECTURE SCHEDULE: 1 Intro to course. Overview of data communication challenges and typical block diagrams. Channel limitations, technology limitations, modulation formats, synchronization. 2 Circuit review 3 TX circuits and optical devices 4 RX circuits 5 RX circuits 6 (Class test #1) Project discussion 7 Finish Rx ccts. Decision circuits. Maybe start oscillators 8 Oscillators 9 PLLs 10 CDRs 11 Equalization. Burst-mode considerations 12 Class test 2 13 Project Due in class, project presentations