Bridging the Gap Between Deep Learning and Edge Hardware

Date May 19, 2026
Hour : 11:00 AM – 1:00 PM
Place Concordia University, EV Building, Room EV2.184, 1515 Ste-Catherine Street West, Montreal

Summary:  Deep learning (DL) models are being deployed to solve various computer vision and natural language processing tasks at the edge. Integrating DL on edge devices enables more efficient and responsive solutions. Hardware-aware Neural Architecture Search (HW-NAS) has recently gained steam by automating the design of efficient DL models for a variety of various target hardware platforms. In this talk I will present state-of-the-art approaches for HW-NAS that are based on three components:

1. Surrogate models to predict quickly architecture accuracy and hardware performances to speed up HW-NAS. The idea is to explore the prospect of Machine Learning for Machine Learning (ML4ML) by introducing techniques to estimate DL models performances on edge devices using neural architectural features and ML-based predictors.
2. Efficient multi-objective search algorithm that explores only promising hardware and software regions of the search space, and
3. New compression techniques that can be combined with HW-NAS to reduce the processing and memory complexities such as computational reuse and dynamic NAS.

Biographical note: Prof. Smail Niar, INSA Hauts-de-France/Université Polytechnique Hauts-de-France (UPHF) & CNRS, received his PhD in computer Engineering from the University of Lille (France) in 1990. Since then, he has been professor at UPHF and INSA Hauts-de-France. He is a member of the computer science department at the “Laboratory of Automation, Mechanical and Computer Engineering”, a joint research unit between CNRS and UPHF/INSA. His research interests are AI/ML-based embedded systems, autonomous transportation systems, HPC, and edge computing.